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New MIPI CSI-2 Receiver IP Core from Sensor to Image
MIPI CSI-2 is one of the most widely used camera sensor interfaces. Many applications require the connection to an FPGA for advanced image pre-processing and further transfer to a host system. Sensor to Image’s MIPI CSI-2 Receiver IP core provides a solution for decoding video streams from CSI-2 sensors in a Xilinx FPGA. In order to shorten the development time, the IP core is delivered with a fully working reference design including Sensor to Image’s MVDK and an IMX274 MIPI FMC module.
MIPI CSI-2 Receiver IP Core
IP Core for MIPI CSI-2 Imagers
AT A GLANCE
- MIPI CSI-2 receiver and decoding block
- Configurable number of MIPI Lanes
- Using Xilinx D-PHY IP
Delivered with a reference design for fast development
Euresys
Euresys is a leading and innovative high-tech company, designer and provider of image and video acquisition components, frame grabbers, FPGA IP cores and image processing software. Euresys is active in the computer vision, machine vision, factory automation and medical imaging.
Discover how Euresys can support your automation journey with their complete range of solutions and expertise.
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