Euresys Product
Sensor to Image’s MIPI CSI-2 Receiver IP core helps to interface MIPI sensors of different vendors to FPGAs.
MIPI CSI-2 Receiver IP Core
IP Core for MIPI CSI-2 Imagers
- MIPI CSI-2 receiver and decoding block
- Configurable number of MIPI Lanes
- Using Xilinx D-PHY IP
- Delivered as working reference design for fast development
- More info: MIPI CSI-2 Receiver IP Core - Euresys
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