Euresys Product
Euresys/S2I's CoaXPress-over-Fiber Device Bridge IP Core allows to connect a CoaXPress Device IP Core to an nGMII bus (10/25 Gbps Media independent i/f) inside a FPGA

CoaXPress-over-Fiber Bridge Device IP Core
CoaXPress-over-Fiber Bridge Device IP Core for FPGA
AT A GLANCE
- CXP to nGMII Bridge IP Core
- Compatible with AMD 7 Series (and newer), Altera Cyclone/Arria 10/Agilex
- Compatible with S2I and third-party CoaXPress Device IP Cores
- Delivered as working reference design (when licensed with the S2I CoaXPress Device IP Core) and extensive simulation testbench
- More on : CoaXPress-over-Fiber Bridge Device IP Core - Euresys
Matthias Schaffland explains the benefits of building Machine Vision systems based on readily available or custom made FPGA IP Cores for the implementation of
- transport layer standards
- sensor interface
- image processing
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