Euresys Product

CoaXPress Device IP Core

Model: 7035

Euresys

Euresys/Sensor to Image offers a set of IP cores and a development framework to build FPGA-based transmitters using the CoaXPress interface.

Image of CoaXPress Device IP Core

CoaXPress Device IP Core

CoaXPress Device IP Core for FPGA

AT A GLANCE
  • Compatible with AMD 7 Series (and newer), Intel Cyclone 10 devices (and newer)
  • Compatible with Microchip PolarFire
  • Compact, customizable
  • Speed support from 1 Gbps to more 100 Gbps
  • Delivered as working reference design
  • More on : CoaXPress Device IP Core - Euresys
Matthias Schaffland explains the benefits of building Machine Vision systems based on readily available or custom made FPGA IP Cores for the implementation of - transport layer standards - sensor interface - image processing

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